Sideworks™ is a patent pending architecture template ideal for multimedia, communications and DSP applications in general. The Sideworks™ template permits automatic generation of reconfigurable accelerators (SideWorks instances) by means of our internal SideGen™ software design tool. Other internal software tools include SideConf™, a configuration and programming tool for SideWorks instances, and SideSim™, a cycle accurate simulation tool.
SideWorks instances are used together with the Coreworks proprietary embedded processor, FireWorks™, to form offload engines implementing one or more functions which can be reconfigured at runtime. Besides the SideWorks capabilities, FireWorks permits the inclusion of custom instructions. Coreworks makes available a set of ready to use processing engines for multimedia, communications and DSP applications in general.
In a typical application, the Coreworks processing engines are autonomous bus masters, fetching code and data from a memory shared with other cores, booting up from a non volatile memory, processing data streams, and being controlled from the outside by means of control and status register files.
Solutions implemented with the SideWorks™ technology are very competitive as they achieve the lowest power consumption and smallest possible silicon area, significantly reducing the cost of the SoC. A more conventional instruction-based DSP or multi-processor solution is three to five times less efficient in terms of power and area, as our certified DSP benchmark results can demonstrate. Finally, the extra degree of post-silicon programmability is of extreme value for implementing bug fixes, upgrades and reducing the overall risk of a multi-million dollar chip design.