Portability:	ASIC and FPGA
Maturity:	Silicon and FPGA proven
Availability:	Now

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Overview

The MPEG-1/2 – Layer I/II Audio Decoder (CWda75) is an audio IP core for decoding one audio stream in real-time(1).

This core contains the MPEG-1/2 – Layer I/II decoder software and the Coreworks processor based hardware audio engine platform (CWda1011).

The software is compiled into an image file (.bin) which can be automatically boot-loaded through one of the control interfaces (parallel AMBA APB or serial SPI) and run on the audio engine platform with simple parameters setting.

The program can be configured, controlled and monitored by means of a configuration, control, and status register file, accessed by the control interfaces.

The audio input and output interfaces uses a native parallel interface. Other standard audio interfaces, such as I2S/TDM and SPDIF are also available.

The interface to the external memory can be one of the following: AMBA AXI (for ASICs or Xilinx FPGAs), Avalon (for Altera FPGAs) or MIG (for Xilinx FPGAs).

The CWda1011 platform is an instance of the generic CWdaXYZ Audio Engine Platform. Other platforms are available for a different number of audio channels (from 2 channels, up to 32 channels). Please contact us to select the best solution for your requirements.

(1) Other IP cores are available for higher number of channels. Please contact us for additional information.

Specifications

• MPEG-1/2 - Layer I/II decoders are compliant with ISO/IEC 11172-3 and 13818-3 audio standards, using Fraunhofer IIS high quality software
• Supported channel modes: mono, dual mono, stereo, and joint stereo
• Supported sampling rates: 16, 22.05, 24, 32, 44.1 and 48 kHz
• 16 to 24-bit output audio resolution
• Requires 550 kB of external memory
• Configurable output latency useful to synchronize with other sources (e.g. video)
• Minimum latency: 1 frame assuming burst data input
• Software interface protocol for control, configuration and monitoring
• Parameter change while muting or repeating one frame
• Real time operation @40 MHz

Interfaces

• AMBA-APB and/or SPI for configuration, control and status
• AMBA-AXI, Avalon or Native MIG interfaces for external memory access (instructions and data access)
• Parallel interface for audio input
• I2S/TDM, SPDIF and/or parallel interface for audio output