Creating Multimedia Future Today
       AN IPBLOQ BRAND
CWda87 - AAC-LC Audio Decoder
Portability: ASIC and FPGA
Maturity: Silicon and FPGA proven
Availability: Now
Download File Product Sheet
Download File Datasheet (Avaiable Soon)
Get Quotation Get Quotation

Overview

The AAC-LC Audio Decoder (CWda87) is an audio IP core for decoding up to 6 audio channels in real-time(1).

This core contains the AAC-LC decoder software and the Coreworks processor based hardware audio engine platform (CWda1011).

The software is compiled into an image file (.bin) which can be automatically boot-loaded through one of the control interfaces (parallel AMBA APB or serial SPI) and run on the audio engine platform with simple parameters setting.

The program can be configured, controlled and monitored by means of a configuration, control, and status register file, accessed by the control interfaces.

The audio input and output interfaces uses a native parallel interface. Other standard audio interfaces, such as I2S/TDM and SPDIF are also available.

The interface to the external memory can be one of the following: AMBA AXI (for ASICs or Xilinx FPGAs), Avalon (for Altera FPGAs) or MIG (for Xilinx FPGAs).

The CWda1011 platform is an instance of the generic CWdaXYZ Audio Engine Platform. Other platforms are available for a different number of audio channels (from 2 channels, up to 32 channels). Please contact us to select the best solution for your requirements.

(1) Other IP cores are available for different number of channels. Please contact us for additional information.

Specifications

  • AAC-LC decoders are compliant with the ISO/IEC 13818-7 audio standard, using Fraunhofer IIS high quality software
  • Supported channel modes: mono, dual mono, stereo (2.0), 2.1, 3.0, 3.1, 4.0, 5.0, and 5.1
  • Supported sample rates: 11.025, 12, 16, 22.05, 24, 32, 44.1 and 48 kHz
  • Supported transport types: ADTS, LATM, and LOAS
  • 16-bit output audio resolution
  • Requires 1,35 MB of external memory
  • Configurable output latency useful to synchronize with other sources (e.g. video)
  • Minimum latency: 1 frame assuming burst data input
  • Software interface protocol for control, configuration and monitoring
  • Parameter change while muting or repeating one frame
  • Real time operation @80 MHz for worst-case settings (maximum bitrate and maximum sampling rate). Results for other settings can be provided upon request

Interfaces

  • AMBA-APB and/or SPI for configuration, control and status
  • AMBA-AXI, Avalon or Native MIG interfaces for external memory access (instructions and data access)
  • Parallel interface for audio input
  • I2S/TDM, SPDIF and/or parallel interface for audio output
Close dropdown
© Copyright 2004-2024 Coreworks S.A. All rights reserved. [Last updated Oct 02, 2017] - Website terms of use